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Impact of Leakage Power Reduction Techniques on Parametric Yield: Low-Power Design of Digital Integrated Circuits under Process Parameter Variations

Impact of Leakage Power Reduction Techniques on Parametric Yield: Low-Power Design of Digital Integrated Circuits under Process Parameter Variations

by Ajit Pal (Author), Sudip Roy (Author)

$69.73

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10 in stock

More Information

Format: Paperback
 Pages: 172
 Publisher: LAP LAMBERT Academic Publishing
Published: 22 Jan 2013
ISBN 10: 3659273910
ISBN 13: 9783659273919