by Krishnendu Chakrabarty (Author), Ran Wang (Author)
The authors describe a set of design-for-test methods to address various challenges posed by the new generation of 2.5D ICs, including pre-bond testing of the silicon interposer, at-speed interconnect testing, built-in self-test architecture, extest scheduling, and a programmable method for low-power scan shift in SoC dies.
Format: Hardcover
Pages: 198
Edition: 1st ed. 2017
Publisher: Springer
Published: 18 Apr 2017
ISBN 10: 3319547135
ISBN 13: 9783319547138