by Dmitry Korchemny (Author), Dmitry Korchemny (Author), John Havlicek (Author), Eduard Cerny (Author), Surrendra Dudani (Author)
This book is a comprehensive guide to assertion-based verification of hardware designs using System Verilog Assertions (SVA). The book makes SVA usable and accessible for hardware designers, verification engineers, formal verification specialists and EDA tool developers.
Format: Hardcover
Pages: 609
Edition: 2nd ed. 2015
Publisher: Springer
Published: 16 Sep 2014
ISBN 10: 3319071386
ISBN 13: 9783319071381