High-Level Verification: Methods and Tools for Verification of System-Level Designs

High-Level Verification: Methods and Tools for Verification of System-Level Designs

by SudiptaKundu (Author), SorinLerner (Author), RajeshK.Gupta (Author)

Synopsis

The growing complexity of the design process for systems on chip (SOCs) allows the use of more demanding computing languages, with a principle goal being verification at a higher level of abstraction. This book focuses on these high-level verification methods.

$164.50

Quantity

20+ in stock

More Information

Format: Hardcover
Pages: 180
Edition: 1st Edition.
Publisher: Springer
Published: 19 May 2011

ISBN 10: 1441993584
ISBN 13: 9781441993588