by ZainalabedinNavabi (Author)
Using Verilog models and test benches for implementing and explaining fault simulation and test generation algorithms, this book treats the concepts of testing and testability in digital systems, and also covers digital design practices and methodologies.
Format: Hardcover
Pages: 435
Edition: 1st Edition.
Publisher: Springer
Published: 18 Dec 2010
ISBN 10: 1441975470
ISBN 13: 9781441975478