by Don Mills (Contributor), Don Mills (Contributor), Stuart Sutherland (Author)
This book will help engineers write better Verilog/SystemVerilog design and verification code as well as deliver digital designs to market more quickly. It shows over 100 common coding mistakes that can be made with the Verilog and SystemVerilog languages.
Format: Illustrated
Pages: 236
Edition: Softcover reprint of hardcover 1st ed. 2007
Publisher: Springer
Published: 05 Nov 2010
ISBN 10: 1441944028
ISBN 13: 9781441944023