Minimizing and Exploiting Leakage in VLSI Design

by KanupriyaGulati (Author), SunilP.Khatri (Author), RajeshGarg (Author), NikhilJayakumar (Author), SuganthPaul (Author)

New
Hardcover
2009
$204.23

This book presents two techniques to reduce leakage power in digital VLSI ICs. The first reduces leakage through the selective use of high threshold voltage sleep transistors, while the second by applying the optimal Reverse Body Bias voltage.

Synopsis

This book presents two techniques to reduce leakage power in digital VLSI ICs. The first reduces leakage through the selective use of high threshold voltage sleep transistors, while the second by applying the optimal Reverse Body Bias voltage.

$204.23

Quantity

20+ in stock

More Information

Format: Hardcover
Pages: 214
Edition: 1st Edition.
Publisher: Springer
Published: 09 Dec 2009
ISBN 10: 1441909494
ISBN 13: 9781441909497

Minimizing and Exploiting Leakage in VLSI Design

New

$204.23

Synopsis

$204.23

More Information