Design Cost-efficient Interconnect Processing Units (System-on-chip Design and Technologies): The Spidergon STNoC

by Marcello Coppola (Author), Miltos D . Grammatikakis (Author), RiccardoLocatelli (Author), Giuseppe Maruccia (Author), Lorenzo Pieralisi (Author)

• New

  Hardcover
  2008

  $121.27

  Examines the technology that is set to replace well-known shared bus architectures, such as STBus, for demanding multiprocessor system-on-chip (SoC) applications. This book shows how the System-on-Chip and Network-on-Chip technology works why developers designed it the way they did the system-level design methodology.