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Design Cost-efficient Interconnect Processing Units (System-on-chip Design and Technologies): The Spidergon STNoC Design Cost-efficient Interconnect Processing Units (System-on-chip Design and Technologies): The Spidergon STNoC by Marcello Coppola, Miltos D. Grammatikakis, Riccardo Locatelli, Giuseppe Maruccia, Lorenzo Pieralisi

Design Cost-efficient Interconnect Processing Units (System-on-chip Design and Technologies): The Spidergon STNoC

by Marcello Coppola, Miltos D. Grammatikakis, Riccardo Locatelli, Giuseppe Maruccia, Lorenzo Pieralisi


ISBN 13: 9781420044713

Format: Hardcover (288 pages)
Publisher: CRC Press
Published: 17 Sep 2008

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